A shift register unit in a related art includes a pull-up transistor. The pull-up transistor is responsible for utilizing a high level signal to pull up a potential of a pull-up node during a charging phase, and charges a first capacitor module, to maintain an output transistor T1 to be turned on during an outputting phase and output a high level signal. The pull-up node and an output node of a current stage need to be maintained in a low level state during the subsequent reset phase and maintaining phase.
According to the timing design in the related art, since a CKB node has to output a high level during the reset phase, and the CKB node has a clock signal, the CKB node may also output a high level signal to the pull-down node PD during the charging phase separated from the reset phase.
However, during the charging phase, the introduction of the high level signal inevitably leads to a problem of insufficient turning off by pulling down. In addition, an instantaneous high current may be generated, increasing the power consumption of the device and possibly causing damage to the device.